In recent years there have been striking increases in the capacity of nonvolatile semiconductor storage devices, of which flash memory is representative, and products with capacities as great as 32 Gbytes have been announced. In particular, the product value of USB memory and storage for mobile phones is increasing. That is, nonvolatile semiconductor storage devices are inherently superior, in areas which are uniquely the realm of solid state element memory, such as resistance to vibration, high reliability, and low power consumption, and so are becoming the mainstream of storage devices for portable music and video content, and as storage for transportable electronic equipment.
On the other hand, separately from the above storage, energetic research is being conducted to impart nonvolatile properties to DRAM currently used as main memory in information equipment, toward the realization of a so-called “instant-on computer” which starts instantaneously upon use and reduces power consumption during standby to infinitesimal levels. In order to realize such computers, it is thought that the technical specifications to be satisfied by DRAM are (1) a switching time of under 50 ns, and (2) overwrite cycles exceeding 1016; in addition, the memory must be provided with nonvolatile properties.
As candidates for such next-generation nonvolatile semiconductor storage devices, research and development are being conducted on ferroelectric memory (FeRAM), magnetic memory (MRAM), phase-change memory (PRAM), and other nonvolatile memory elements based on various principles. Among these, MRAM is viewed as a promising candidate to satisfy the above technical requirements to replace DRAM. The number of overwrite cycles (>1016) cited in the above technical requirements is the numerical value assumed based on the number of accesses resulting from continuous accessing every 30 ns for 10 years. When the memory is nonvolatile, a refresh cycle is not necessary, and so there are cases in which this number of cycles is not necessary. Although MRAM is at the prototype level, already 1012 or more overwrite cycles have been achieved, and as switching times are also fast (<10 ns), feasibility is regarded as high compared with other technologies which are candidates for nonvolatile semiconductor storage devices.
Problems with this MRAM are a large cell area, and high accompanying bit cost. Currently commercialized low-capacity (approximately 4 Mbits) MRAMs are current-induced magnetic field overwrite type devices. If the cell area is from 20 to 30 F2 (where F is the minimum feature size of the manufacturing process) or larger, because of the excessive size, such devices are not practical as a replacement technology for DRAM. On the other hand, two breakthrough technologies are changing the situation. One is magnetic tunnel junction (MTJ) devices using MgO tunnel insulating films, by which means a magnetoresistance of 200% or more can easily be obtained (see for example Non-patent Reference 1). The other is a current-induced magnetization switching (STT) method. The STT method is a technology which can avoid the problem, critical in current-induced magnetic field overwrite type devices, that the magnetic reversal field in minute cells increases; that is, this technology enables lowering of the write energy with scaling. By means of this STT method, a one transistor-one MTJ configuration theoretically becomes possible, and so cell areas of 6 to 8 F2, comparable to DRAM, are anticipated (see for example Non-patent Reference 2).
The STT method is a method in which the magnetization of the free layer is reversed by the current polarity. In order for the magnetization to be parallel in the free layer and in the pinned layer, a current is passed from the free-layer side, that is, spin-polarized electrons are injected into the free layer from the pinned-layer side via a nonmagnetic layer. Conversely, to make the magnetization antiparallel, a current is passed from the pinned-layer side. That is, spin-polarized electrons are injected from the free-layer side into the pinned-layer side via the nonmagnetic layer. At this time, only electrons having spin parallel to the pinned layer are passed; electrons with spin not parallel to the pinned layer are reflected, and accumulate in the free layer. As a result, the magnetization of the free layer is thought to be disposed antiparallel to the pinned layer. That is, in this method electrons are injected so as to conserve angular momentum, including localized spin.
In the above STT method, during integration at levels of 1 Gbit or higher, the current density during switching must be lowered to 0.5 MA/cm2, and so various measures have been taken. For example, a structure has been disclosed in which a magnetic layer having an easy axis of magnetization perpendicular to the magnetization of the free layer is provided above the free layer with a nonmagnetic metal layer intervening (see Patent Reference 1). The aim is to lower the current density necessary for switching by injecting a spin current perpendicular to the magnetization of this free layer into the free layer. In particular, an MTJ using a perpendicular magnetization film can be expected to offer the advantages of (1) reduced current density and (2) reduced cell area compared with an element using an in-plane magnetization film, and so use of the above method in an MTJ employing a perpendicular magnetization film is thought to be promising.
Further, a structure has also been disclosed in a magnetic phase transition layer capable of magnetic phase transitions, that is, transitions from antiferromagnetism to ferromagnetism, and from ferromagnetism to antiferromagnetism, is formed directly on a free layer, and the two layers are exchange-coupled. The aim is, by causing magnetic coupling of the two layers, to reduce the magnetization during switching, and reduce the current density during switching, through changes in the magnetization of the magnetic phase transition layer from perpendicular magnetization to in-plane magnetization (see Patent Reference 2).    Patent Reference 1: Japanese Patent Application Laid-open No. 2008-28362    Patent Reference 2: Japanese Patent Application Laid-open No. 2009-81215    Non-patent Reference 1: D. D. Djayaprawira et al, “230% room-temperature magnetoresistance in CoFeB/MgO/CoFeB magnetic tunnel junctions”, Applied Physics Letters, Vol. 86, 092502, 2005    Non-patent Reference 2: J. Hayakawa et al, “Current-induced magnetization switching in MgO barrier based magnetic tunnel junctions with CoFeB/Ru/CoFeB synthetic ferromagnetic free layer”, Japanese Journal of Applied Physics, Vol. 45, L1057-L1060, 2006
However, in the structure first cited (Patent Reference 1), although lowering of the current density during switching can be expected, there is instead the problem that reliability as a nonvolatile memory element is worsened. That is, during readout also the magnetic field leaking from the magnetic layer provided on the free layer acts on the magnetization in the free layer which is storing information, so that the problem of readout disturbance arises, and there is the problem that retention characteristics are degraded.
Further, in the second structure cited (Patent Reference 2), there is the problem that the switching characteristics depend on the magnetic coupling between the magnetic phase transition layer and the free layer, that is, on the quality of the abovementioned exchange coupling. That is, depending on the state of coupling, there are concerns that problems of variation in switching characteristics may occur.